EET330

Errata Sheet for
Digital Logic Circuit Analysis and Design
First Edition
By Victor P. Nelson, et al.

Chapter 1 Errata
Pg 24 Table 1.2B	*09 = 0 not 9**
Pg 31 Ex 1.17	reads the weight of the 3rd fraction digit to be -2 when it should read -3.
Pg 31 Ex 1.17	the actual problem work comes up with the correct answer but the work is wrong.
Pg 63, ASCII table	The subscript 4 needs to be moved to the left so that the column label will read C₆C₅C₄. The character in position 3A should be a colon vice a semicolon. The character in position 2C should be a (,) vice a (').
Pg 66, Fig. 1.6(b) caption	For Figure B caption description, change "Double Error Correction" to "Double Error Detection"
Pg 74, Problem 1.1	Perform in 2's complement system. Use a large enough N value to prevent an incorrect answer. Only add or subtract. Do not multipy or divide.
Pg 74, Problem 1.2	Perform in 8's complement system. Use a large enough N value to prevent an incorrect answer. Only add or subtract. Do not multipy or divide.
Pg 74, Problem 1.3	Perform in 16's complement system. Use a large enough N value to prevent an incorrect answer. Only add or subtract. Do not multipy or divide.
Pg 75, Problem 1.8	Change n = 8 to n= 9 (DO NOT USE ANY OTHER N VALUE) Place into the 2cm system and then find it's negative. No matter what, use a large enough N value to prevent an incorrect answer.
Pg 75, Problem 1.10	Change n=8 to n = 9 (DO NOT USE ANY OTHER N VALUE) When it asks you to subtract or add a negative, find the negative of the correct number and add. If an overflow occurs, indicate that in the answer.
Pg 76, Problem 1.13	Don't do the excess-3 part unless specifically asked for when assigned.
Pg 76, Problem 1.14b	Place a space between each element in the equation.
Pg 76, Problem 1.18	Should refer to Fig. 1.8 vice Fig. 1.7
Chapter 2 Errata
Pg 89, Example 2.20	The author used a technique on the second to last step in the example which causes some confusion. In my heart I don't believe what he did is a very good habit to get into because it can lead you into dark alleys and disturbing places, but it is correct. If you like, add the following two lines between the last two lines: a'+ab'x'+b'z' (P3a) a'+b'x'+b'z' (T5a)
Pg 93, Table 2.4b	The 11 and 10 are reversed. It should be 10 and 11.
Pg 106, Fig 2.4 Symbol set 2	The IEEE NOT gate should only have a single input "a" vice two inputs.
Prob. 2.26	The switching list should have a D in it. It should be (A, B, C, D)
Pg 131, Fig 2.28b	The figure incorrectly says that inverters are counted as a level. Inverters are NOT counted as a level.
Pg 144, 1st para., 5th line	Change "result is the converted" to "result is then converted"
General HW Note #1: All problems stand alone. If they refer to a previous problem you can not just say "Using the results from ---". Specifically, 2-16 - 2-19, but others may exist in this chapter and later chapters.
General HW Note #2: If you are asked to solve an expression, or expand it, via truth tables, then you must do it the way it is done in the notes. Each term in the expression should have its own column. If there is a Bnot for example, there better be a Bnot column.
Pg 168, Problem 2-19	It is asking for the Algebraic Canonical, not the Numeric Canonical. You can use the previous results (see above). Expand the problem by algebraic expansion.
Pg 168, Problem 2-20	Give the answer in both Algebraic Canonical and Numerical Canonical
Pg 168, Prob. 2.21	The switching list order is f(W,X,Q)
Pg 170, 1Prob. 2.26	Change f(A,B,C) to f(A,B,C,D)
Pg 170-171, Prob. 29-30	Show algebra, not the circuit. If you want to show circuit as well, feel free